diff --git a/include/utils.h b/include/utils.h
index 78a8fe9..cd20b31 100644
--- a/include/utils.h
+++ b/include/utils.h
@@ -13,9 +13,9 @@ uint32_t fat32_datetime(uint16_t year, uint8_t month, uint8_t day, uint8_t hour,
 
 //got these from osdev.org
 void cpuid(int code, uint32_t *a, uint32_t *d);
-bool cpuHasMSR();
-void cpuGetMSR(uint32_t msr, uint32_t *lo, uint32_t *hi);
-void cpuSetMSR(uint32_t msr, uint32_t lo, uint32_t hi);
+bool cpu_has_msr();
+void cpu_get_msr(uint32_t msr, uint32_t *lo, uint32_t *hi);
+void cpu_set_msr(uint32_t msr, uint32_t lo, uint32_t hi);
 
 #define inb inportb
 #define outb outportb
diff --git a/src/kernel/apic.c b/src/kernel/apic.c
index 6dabd5f..9be059c 100644
--- a/src/kernel/apic.c
+++ b/src/kernel/apic.c
@@ -44,12 +44,12 @@ void cpu_set_apic_base(uintptr_t apic) {
     edx = (apic >> 32) & 0x0f;
  #endif
  
-    cpuSetMSR(IA32_APIC_BASE_MSR, eax, edx);
+    cpu_set_msr(IA32_APIC_BASE_MSR, eax, edx);
  }
 
 uintptr_t cpu_get_apic_base() {
     uint32_t eax, edx;
-    cpuGetMSR(IA32_APIC_BASE_MSR, &eax, &edx);
+    cpu_get_msr(IA32_APIC_BASE_MSR, &eax, &edx);
  
  #ifdef __PHYSICAL_MEMORY_EXTENSION__
     return (eax & 0xfffff000) | ((edx & 0x0f) << 32);
@@ -82,7 +82,7 @@ uint32_t lapic_read(uint32_t offset) {
 }
 
 void lapic_eoi() {
-    lapic_write(LAPIC_EOI_REG, 0);
+   lapic_write(LAPIC_EOI_REG, 0);
 }
 
 void ioapic_init()
diff --git a/src/kernel/kernel.c b/src/kernel/kernel.c
index 05d6eaf..ad81f28 100644
--- a/src/kernel/kernel.c
+++ b/src/kernel/kernel.c
@@ -46,12 +46,12 @@ void kmain(unsigned int magic, unsigned int info)
 
 	isr_install();
 
-	if(cpuHasMSR())
+	if(cpu_has_msr())
 	{
 		printf("CPU has MSR\n");
 	}
 
-	if(check_apic() && cpuHasMSR())
+	if(check_apic() && cpu_has_msr())
 	{
 		printf("APIC is present\n");
 		lapic_enabled = true;
diff --git a/src/utils/utils.c b/src/utils/utils.c
index 972ef51..549b0ae 100644
--- a/src/utils/utils.c
+++ b/src/utils/utils.c
@@ -65,19 +65,19 @@ inline void cpuid(int code, uint32_t *a, uint32_t *d)
 
 const uint32_t CPUID_FLAG_MSR = 1 << 5;
 
-bool cpuHasMSR()
+bool cpu_has_msr()
 {
    static uint32_t a, d; // eax, edx
    cpuid(1, &a, &d);
    return d & CPUID_FLAG_MSR;
 }
 
-void cpuGetMSR(uint32_t msr, uint32_t *lo, uint32_t *hi)
+void cpu_get_msr(uint32_t msr, uint32_t *lo, uint32_t *hi)
 {
    asm volatile("rdmsr" : "=a"(*lo), "=d"(*hi) : "c"(msr));
 }
 
-void cpuSetMSR(uint32_t msr, uint32_t lo, uint32_t hi)
+void cpu_set_msr(uint32_t msr, uint32_t lo, uint32_t hi)
 {
    asm volatile("wrmsr" : : "a"(lo), "d"(hi), "c"(msr));
 }
\ No newline at end of file